LHA5652-2
The LHA5652-2 is an intelligent, low noise, power, multiplexed, Σ-Δ analog-to-digital converter (ADC) with 2- or 4-channel (fully differential/single-ended) inputs for low bandwidth signals. The LHA5652-2 has a maximum channel scan rate of 6.21 kSPS (161 μs) for fully settled data. The output data rates range from 1.25 SPS to 31.25 kSPS.
The LHA5652-2 integrates key analog and digital signal conditioning blocks to allow users to configure an individual setup for each analog input channel in use via the SPI. Integrated true rail-to-rail buffers on the analog inputs and external reference inputs provide easy to drive high impedance inputs. The precision 2.5 V low drift (2 ppm/℃) band gap internal reference (with an output reference buffer) adds embedded functionality to reduce the external component count.
The digital filter allows simultaneous 50 Hz and 60 Hz rejection at a 27.27 SPS output data rate. The user can switch between different filter options according to the demands of each channel in the application, with further digital processing functions such as offset and gain calibration registers, which are also configurable on a per channel basis. General-purpose inputs/outputs (GPIOs) control external multiplexers synchronous to the ADC conversion timing.
The specified operating temperature range is −40 ℃ to +105 ℃. The LHA5652-2 is in a 24-lead TSSOP package.
Note that, throughout this data sheet, the dual function pin names are referenced by the relevant function only.
Product Features
- Fast and flexible output rate: 1.25 SPS to 31.25 kSPS
- Channel scan data rate of 6.21 kSPS/channel (161 μs settling)
- Performance specifications
- 16.3 noise free bits at 31.25 kSPS
- 24 noise free bits at 1.25 SPS
- INL: ±1 ppm of FSR
- 85 dB rejection of 50 Hz and 60 Hz with 50 ms settling
- User configurable input channels
- 2 fully differential channels or 4 single-ended channels
- Crosspoint multiplexer
- On-chip 2.5 V reference (±2 ppm/℃ drift)
- True rail-to-rail analog and reference input buffers
- Internal or external clock
- Power supply
- AVDD1 = 3.0 V to 5.5 V. AVDD2 = IOVDD = 2 V to 5.5 V
- Split supply with AVDD1 and AVSS at ±2.5 V or ±1.65 V
- ADC current: 1.4 mA
- Temperature range: −40 ℃ to +105 ℃
- 3- or 4-wire serial digital interface (Schmitt trigger on SCLK)
- Serial port interface (SPI, QSPI, MICROWIRE-, and DSP compatible)
Application Scenario
- Process control: PLC/DCS modules
- Temperature and pressure measurement
- Medical and scientific multichannel instrumentation
- Chromatography
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